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(parent: fe92133) | patch
x86/MCE: add SRAR handler
authorLiu, Jinsong <jinsong.liu@intel.com>
Thu, 15 Dec 2011 09:54:51 +0000 (10:54 +0100)
committerLiu, Jinsong <jinsong.liu@intel.com>
Thu, 15 Dec 2011 09:54:51 +0000 (10:54 +0100)
commitcdf1da9433e0ddf3345fc5a04840b0171d8f0f0e
tree13400a74c7ecae130ded10fd615a0a9d44207051tree | snapshot
parentfe92133300de8a7399cd8084735eda919a1b128ecommit | diff
x86/MCE: add SRAR handler

Currently Intel SDM add 2 kinds of MCE SRAR errors:
1). Data Load error, error code = 0x134
2). Instruction Fetch error, error code = 0x150
This patch add handler to these new SRAR errors.
It based on existed mce infrastructure, add code to handle SRAR specific error.

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Committed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/cpu/mcheck/mce_intel.c diff | blob | history
xen/arch/x86/cpu/mcheck/x86_mca.h diff | blob | history
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